The present invention relates to a semiconductor integrated circuit (IC), and more particularly to an IC having improved input initial-stage circuits.
An IC has at least one each of power supply terminal and grounding terminal. The power supply terminal and the grounding terminal are connected to the bonding pads of the semiconductor chip, i.e. the power supply pad and the grounding pad, respectively. The power supply pad and the grounding pad are connected to the power supply wiring layer and the ground wiring layer, respectively. Electronic circuits in the semiconductor chip are connected to the power supply wiring layer and the ground wiring layer. The power supply wiring layer and the ground wiring layer are usually formed of films of aluminum alloy, such as Al--Si--Cu, and have sheet resistances of 30 to 40 m.OMEGA./.quadrature.. Accordingly, there is a resistance between the power supply pad or the grounding pad and any electronic circuit.
An input initial-stage circuit has the role to convert an input signal, supplied from outside, into an internal signal. In a CMOS integrated circuit, it converts a digital signal of the TTL level, for instance, into one of the CMOS level.
In a conventional IC according to the prior art, a plurality of input initial stage circuits are designed in the same shape and dimensions irrespective the position in which each is arranged on the IC chip. Even if all these input initial stage circuits have the same logical threshold, the distances from the power supply pad and from the grounding pad differ from one input initial stage circuit to another, and individual input initial stage circuits differ from one another in parasitic resistance, so that the effective logical threshold as viewed from an external terminal differs from one input initial stage circuit to another. Where many input initial stage circuits are connected to a single wiring layer and become operative at the same time, the variations of their effective logical thresholds increase.
Among the typical examples of such input initial stage circuits are the address inverters of a semiconductor memory. All these address inverters, which are circuits to receive address signals of the TTL level given from outside and convert them into signals of the CMOS level, become operative in a write-in or read-out operation. While the number of address terminals increases as the semiconductor memory becomes more highly integrated, the thickness of the aluminum alloy films decreases, resulting in greater parasitic resistances. Accordingly, there is a great difficulty to keep the effective logical thresholds of the address inverters of a semiconductor memory within a prescribed standard range.